1. Field of the Invention
This invention relates to transistor output circuits, namely circuits in which an output transistor is used to provide a variable output voltage or current over time. An example of such a circuit is a current sampling circuit, for example that provides a current output in response to a sensing function.
2. Description of the Related Art
In a number of sensing applications, the sensing devices (for example diodes or transistors) generate an output current which depends on the parameter to be sensed. The range of applications in which current sensors can be used is enormous, and this invention can be applied to any such application. For example, the parameter to be sensed can be a light level in the case of a photosensor or a temperature in the case of a temperature sensor. The sensor will measure a physical property such as light, temperature, strain or other forces.
The output current of a sensor will often be very small, and it is advantageous to convert the signal to a more robust form close to the sensor in order to preserve the quality of the signal, particularly the signal to noise ratio. Sampling of the current is required in the case where the signal changes over time or when the output of several sensors is multiplexed together as is the case for an array of sensors.
FIG. 1 shows a known simple sampling circuit.
The current to be sampled may for example comprise a photocurrent, and is represented by a current source CS1. The current is drawn through a p-type drive transistor Tip, which has a capacitor C1 connected between its source and gate. This capacitor can thus store the gate-source voltage corresponding to the current being sampled.
The circuit has a first switch S1 (with timing Clk1) between the gate and drain of the transistor T1p for turning the transistor T1p on so that it can supply the current being sampled. A second switch S2 (with timing Clk2) couples the sampling transistor T1p to the sensor CS1, and a third switch S3 (with timing Clk3) couples the sampling transistor T1p to the output OUT of the sampling circuit.
As shown in FIG. 2, during a sampling phase S, the switches S1 and S2 are closed and the switch S3 is open. The current to be sampled, the photocurrent in this example, is drawn through the transistor T1p. The voltage present on the gate and the drain of the transistor T1p settles at a value which produces a drain current in the transistor T1p which is equal to the photocurrent. This voltage becomes stored across the capacitor C1. During a holding phase H, the switches S1 and S2 are opened and the switch S3 is closed. The gate-source voltage of the transistor T1p is maintained by the capacitor C1 and therefore the sampled photocurrent is available at the output OUT of the circuit.
The time required to sample the current is proportional to (C1+Cd)/gm1, wherein Cd is the capacitance of the sensor (i.e. the photodiode) and gm1 is the transconductance of the transistor T1p. When the current to be measured is small, the transistor T1p will be operating in the sub-threshold region. In this region, the value of gm1 is proportional to the drain current Id1. Therefore when the current to be sampled is low, the settling time is extended.
Low temperature polysilicon (LTPS) technology allows CMOS circuits to be integrated on large area substrates and is used to make devices such as active matrix liquid crystal displays. Integration of sensors onto displays is of increasing interest and therefore the design of thin film transistor (TFT) circuits for processing the signals from these sensors is becoming more important. The TFTs within circuits which process the output from the sensing device may be biased close to their threshold voltage or even in the sub-threshold region as explained above, especially when dealing with very small currents, and under these bias conditions, they can demonstrate some undesirable behaviour.
Thin film transistors can exhibit current overshoot or undershoot effects when the bias voltages applied to them are changed. This is illustrated in FIG. 3, which shows schematically how the drain current of a transistor changes when a voltage step is applied to the gate of the device. When the gate-source voltage is switched from a first value VGS1 to a second lower value VGS2, the drain current ID of an n-type TFT initially falls to a lower level but over time increases until it reaches a steady state value. When the gate-source voltage is switched from the lower level VGS2 to the higher level VGS1, the drain current initially increases to a higher level but then decreases over time until it reaches its steady state value. This transient behaviour results from the trapping of carriers within the device, and the magnitude of the transient and the time required for the current to reach its steady state value are such that the performance of circuits using the devices can be significantly affected. This behaviour is most pronounced when the TFT is operating in the sub-threshold region but may also be significant close to the threshold voltage which is typically where devices are biased in analogue circuits.
The magnitude of the transient can be more than 50% and the time required for the current to reach its steady state value can be more than 50 ms. This is much slower than the other transient response times in the circuits, for example derived from capacitor charging times. This transient behaviour therefore can become the dominant cause of errors in the output of a current sampling circuit.
FIG. 4 shows an example of the drain current transient behaviour measured in an n-type LTPS TFT when the gate-source voltage is stepped from 2.5V to 1.0V at t=0 with a drain-source voltage of 2.5V. The drain current initially falls to a value of approximately 0.5 nA but then rises over a period of about 30 ms to a value of 2.3 nA.
In some circuits, the TFTs may experience significant disturbance to their gate voltage in addition to any changes associated with the signal that is being processed. An example of this would be when a node within the circuit has to be pre-charged to a certain voltage level before a signal voltage is applied or generated on the node. These disturbances can trigger the slow transient currents illustrated in FIG. 4 which may in turn produce errors in the output of the circuit.
This problem applies generally when transistors provide a varying output voltage or current, and not only in connection with current sensing applications.